Testing is a critical activity in semiconductor device manufacturing, including probe and assembly operations. The manufacturing environment at the testing stage is characterized by multiple products, test equipment with varying capability, and specialized kits and handlers that may be product and equipment specific.
Currently available commercial test-interface systems are incapable of being quickly adapted for testing of different types of devices and consequently do not allow for expanded testing of the device under test. Moreover, commercial test-interface systems are not capable, without being substantially modified, of testing both digital and analog devices. Furthermore, the mechanical design of commercial test-interface systems limits a use of high frequency clock for testing.
A conventional semiconductor test system for testing semiconductor integrated circuit devices includes a handler, a test head, and, a test analyzer. The test head includes pins that are mounted in the test head on pin cards and are connected to respective pin electronics circuits. The pin electronics circuits generate stimulus signals for a test application to the input pins of a device under test (DUT) to test or measure response signals provided at output pins of the DUT.
For testing, the DUT is fitted in a socket that is attached to a DUT board mounted in a test handler. Generally speaking, the test head is positioned with its DUT engagement board facing toward the OUT board. The DUT engagement board includes tester pins. The tester pins engage the DUT board, which make electrical connections between the tester pins and the DUT.
Currently available commercial test-interface systems generally use pogo pin systems for interfacing with a DUT. The Pogo pin connectors are expensive and have a short life span due to frequent pin bending and breakages. The need for replacing these connectors considerably reduces overall efficiency of the testing system. Furthermore, because test signals have to travel comparatively long distance, the clock frequency of the test signals is limited due to the length of the signal path.
Hence, it is within this context that embodiments of the invention arise.